mDecoder

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.numeric_std.all;
use IEEE.numeric_bit.all;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity MDecoder is
   port
   (
	  clk : in std_logic;
      machine_index : in std_logic_vector(2 downto 0);
      machine_select : out std_logic_vector(7 downto 0)
   );
end entity MDecoder;
 
architecture Behavioral of MDecoder is
begin
	process(clk, machine_index)
	begin
	case machine_index is
 
		when "000" =>
			if(clk='1') then
				machine_select <= "10000000";
			elsif(clk='0') then
				machine_select <= "00000000";
			end if;
		when "001" =>
			if(clk='1') then
				machine_select <= "01000000";
			elsif(clk='0') then
				machine_select <= "00000000";
			end if;
		when "010" =>
			if(clk='1') then
				machine_select <= "00100000";
			elsif(clk='0') then
				machine_select <= "00000000";
			end if;
		when "011" =>
			if(clk='1') then
				machine_select <= "00010000";
			elsif(clk='0') then
				machine_select <= "00000000";
			end if;
		when "100" =>
			if(clk='1') then
				machine_select <= "00001000";
			elsif(clk='0') then
				machine_select <= "00000000";
			end if;
		when "101" =>
			if(clk='1') then
				machine_select <= "00000100";
			elsif(clk='0') then
				machine_select <= "00000000";
			end if;
		when "110" =>
			if(clk='1') then
				machine_select <= "00000010";
			elsif(clk='0') then
				machine_select <= "00000000";
			end if;
		when "111" =>
			if(clk='1') then
				machine_select <= "00000001";
			elsif(clk='0') then
				machine_select <= "00000000";
			end if;
		when others =>
				machine_select <= "00000000";
		end case;
	end process;
end architecture Behavioral;